1. Field of the Invention
The present invention relates to a voltage/current converting circuit for converting a voltage into an electric current, and to a PLL circuit including this circuit.
2. Related Background Art
Over the recent years, in a field where a high-speed operation is demanded as a speed and a quantity in data communications and an operation speed of a microprocessor increase, what has been re-recognized is a significance of analog circuits. Among these circuits, mainly a synchronous circuit such as a PLL (Phase Locked Loop) circuit is treated as a significant macro block, and a multiplicity of analog circuits are employed in the PLL circuit.
FIG. 3 is a block diagram showing a circuit configuration of a typical PLL circuit. In this PLL circuit, a reference clock signal REFCLK is supplied to a phase comparator 1, and output voltage thereof is supplied to a charge pump circuit (CHP) 2, wherein the voltage is converted into an electric current. This current passes through a low-pass filter (LPF) 3 composed of two resisters and a capacitor, and a voltage is generated by the capacitor. This voltage is converted into an electric current by a voltage/current converting circuit 4, and an ICO 5 generates a frequency corresponding to this current. This frequency is divided by a frequency divider 6, then supplied to the phase comparator 1 and compared with the reference clock signal, thereby obtaining a fixed frequency.
A stable operation of this PLL circuit must involve an precise conversion of the voltage into the Current.
FIG. 4 shows a conventionally known voltage/current converting circuit used in the PLL circuit.
In this voltage/current converting circuit, an output of an operational amplifier 31 with a non-inverting terminal serving as an input terminal, is supplied to a gate of an N-channel MOS transistor QN33, and a source of the N-channel MOS transistor QN33 is grounded through a resistor R32. A drain of the N-channel MOS transistor QN33 is connected to a drain of a P-channel MOS transistor QP34 with its source connected to e power supply. A connecting point between the resistor R32 and the source of the N-channel MOS transistor QN33, is connected to an inverted input terminal of the operational amplifier 31. A common connecting point between the drain of the N-channel MOS transistor QN33 and the drain of the P-channel MOS transistor QP34, is connected to a gate of the P-channel MOS transistor QP34, and a gate electrode thereof serves as an output terminal.
Next, an operation of this voltage/current converting circuit will be explained.
This voltage/current converting circuit generates the current at the output terminal by applying, to both terminals of the resistor R32, the same voltage as a voltage applied to an input terminal IN.
When the voltage applied to the input terminal IN is higher than a voltage NS1 of the connecting point between the resistor R32 and the N-channel MOS transistor QN33, a voltage of an output OP0 of the operational amplifier 31 increases. This voltage is supplied to the gate of the N-channel MOS transistor QN33, and hence a driving force thereof augments while an electric potential of a terminal NS1 increases with an inclination toward V.sub.DD. Reversely when the voltage of the terminal IN is lower than the voltage of the terminal NS1, the potential of the output OP0 of the operational amplifier 31 reduces. As a result, the driving force of the N-channel MOS transistor QN33 decreases, and therefore the potential of the terminal NS1 decreased with an inclination toward GND. Thus, the control is conducted to equalize the voltage of the terminal IN to the potential of the terminal NS1.
On the other hand, an output current Iout supplied by the P-channel MOS transistor QP34 is equal to the current flowing across the resistor R32 and therefore given by: EQU Iout=Vin/R (1)
where Vin is the voltage applied to the input terminal IN, and R is the resistance value of the resistor R32. The current proportional to the input voltage can-be thereby fetched.
In PLL circuits used particularly in communications field, no dispersion in gain, which is caused depending on products, is required. It is herein known that a principal cause of the dispersion in gain is a scatter in element characteristic due to dimensional irregularity created in terms of a manufacturing process.
For example, in the circuit shown in FIG. 3, when the resistor R32 is actualized in a chip, the resistance value has a 2-fold difference between the maximum and the minimum, considering that a sheet resistance fluctuates on the order of .+-.30% depending on the process. As a result, it follows that the gain of the voltage/current converting circuit comes to have a 2-fold fluctuation width according to the formula (1).
Accordingly, it is in fact difficult to prevent the gain of the conventional voltage/current converting circuit from fluctuating due to the fluctuation in process.
The resistance is provided outwardly of the chip in order to avoid such a large fluctuation. In the case of a so-called exterior fitting type described above, however, it is required that pins be prepared for connecting the resistor. It is still impossible to increase the number of such pins in the great majority of integrated circuits that have already been deficient in the pins.